The present invention relates to a method of manufacturing a semiconductor wafer, and more particularly to a method of manufacturing an epitaxial wafer of high purity.
The fabrication of many advanced silicon devices requires the use of semiconductor wafers with precise electrical characteristics. Often, the electrical properties of the wafer are engineered by depositing a layer of epitaxial silicon with precisely controlled levels of dopants onto the frontside of the wafer. A wafer with such a layer is known as an epitaxial wafer.
The precise engineering of the electrical properties of an epitaxial wafer requires the concentration of dopants within the wafer to be closely controlled. The presence of impurities other than the desired levels of dopants can degrade wafer performance in several ways. First, some impurities are mobile in the silicon lattice, and others are capable of donating carriers to the wafer. These impurities may degrade wafer performance by changing the conductivity of the wafer. Other impurities may cause defects, such as dislocations, in the crystal structure of the wafer. The presence of these defects may lead to higher leakage currents and lower breakdown voltages in devices fabricated on the wafer.
The manufacture of an extremely pure epitaxial wafer can be difficult, as many steps in the overall manufacturing process can potentially cause contamination of the wafers. One example is the crystal growing process. First, the many metal instruments used in the crystal growing process can contaminate the melt with metallic impurities. These impurities may then be incorporated into a silicon crystal pulled from the melt. Second, the crucible from which the crystal is pulled is generally made of a silicon dioxide compound, such as quartz. Prolonged exposure to the melt can cause the wall of the crucible to undergo phase transformations to other crystalline silicate phases, such as xcex2-cristobalite. The phases may be either more or less resistant to the melt than the surrounding regions of the crucible. This can result in the undercutting of the more resistant regions as the melt erodes away the less resistant regions more rapidly. Such undercutting can cause small particles from the crucible wall to be released into the melt. These particles may be incorporated into the growing crystal, possibly causing defects to form in the crystal lattice.
Another process that can result in the contamination of the epitaxial layer is the epitaxial deposition process itself. Often, the wafer on which the epitaxial layer is to be deposited is heavily doped with a dopant such as boron. When the wafer is heated for the epitaxial deposition process, there is a danger that the dopant may diffuse out of the lattice from the wafer backside and cause contamination of the growing epitaxial film. To prevent this, many epitaxial deposition processes include an oxide back seal step to seal the wafer backside before the deposition of the epitaxial film. The oxide back seal helps to prevent the dopant from contaminating the epitaxial layer, but the extra process steps necessary for the oxide deposition can themselves introduce contaminants into the wafer. Furthermore, for the fabrication of some devices, it may be necessary to use an epitaxial wafer that has had its oxide back seal removed. The removal of the oxide back seal is generally performed with an hydrofluoric acid stripping step. As with many wet-chemical processes, the HF stripping step can introduce contaminants into the epitaxial layer of the wafer, and thus can potentially hurt device performance.
The present invention provides a method of manufacturing a high-purity epitaxial silicon wafer. The method includes providing a quartz crucible for melting silicon; adding silicon to the crucible; heating the crucible to form a melt; applying an electrical potential across the crucible; pulling a silicon crystal from the melt; forming a silicon wafer from the silicon crystal, the wafer having a frontside and a backside; and simultaneously depositing an epitaxial first silicon film on the frontside of the wafer and a polycrystalline second silicon film on the backside of the wafer.